[ engineering ]

Sr. Full Chip Physical Verification Engineer (silicon Engineering)

SpaceX
Location
Palo Alto, California
Work mode
On-site
Type
full time
Listed
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[ About this role ]

SpaceX is seeking a Senior Full Chip Physical Verification Engineer to develop cutting-edge next-generation silicon for Starlink. Responsibilities include owning and executing full-chip DRC, LVS, ESD, PERC, and antenna signoff using industry-standard tools, developing and optimizing physical verification flows for advanced node SoCs, and interpreting foundry Design Rule Manuals.

Skills and focus areas

  • physical verification
  • drc
  • lvs
  • esd
  • perc
  • antenna signoff
  • soc design
  • design rule manuals
  • debug

Summary written by Ramai from the original posting. Full details and requirements are on SpaceX’s careers page.

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