[ engineering ]

Sr. Full Chip Physical Verification Engineer (silicon Engineering)

SpaceX
Location
Irvine, California
Work mode
On-site
Type
full time
Listed

Applications go directly to SpaceX. Ramai takes no fee for placement and no money for ranking.

[ About this role ]

SpaceX is seeking a Senior Full Chip Physical Verification Engineer for their Silicon Engineering team in Irvine, California. This role involves owning and executing full-chip DRC, LVS, ESD, PERC, and antenna signoff using industry-standard tools, developing and optimizing physical verification flows for advanced node SoCs, and interpreting foundry Design Rule Manuals.

Skills and focus areas

  • physical verification
  • drc
  • lvs
  • esd
  • perc
  • antenna signoff
  • soc design
  • design rule manuals
  • debug
  • problem solving

Summary written by Ramai from the original posting. Full details and requirements are on SpaceX’s careers page.

[ More at SpaceX ]

See all 2874 open roles at SpaceX →

[ Similar roles at other startups ]

Browse all open engineering roles →

[ Not quite right? ]

Tell the assistant what you’re after — stage, location, stack, visa sponsorship — and it searches every open role for you. A few questions are free, no account needed.