Sr. Asic Design Verification Engineer (silicon Engineering)
SpaceX- Location
- Palo Alto, California
- Work mode
- On-site
- Type
- full time
- Listed
Applications go directly to SpaceX. Ramai takes no fee for placement and no money for ranking.
[ About this role ]
SpaceX is seeking a Sr. ASIC Design Verification Engineer for their Silicon Engineering team in Palo Alto, California. This role involves digital ASIC verification at block and system levels, including test plan development, execution, regression, and coverage closure, as well as contributing to pre-silicon verification, chip bring-up, and post-silicon validation.
Skills and focus areas
- asic verification
- digital design
- test plans
- test harnesses
- test sequences
- regressions
- code coverage
- functional coverage
- pre-silicon verification
- chip bring-up
- post-silicon validation
- self-starter
Summary written by Ramai from the original posting. Full details and requirements are on SpaceX’s careers page.
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