Senior Fpga Verification Engineer, Air Dominance and Strike

Senior FPGA Verification Engineer at Anduril Industries in Costa Mesa, CA. This role involves owning the verification of FPGA/SoC designs on AMD (Xilinx) platforms for flight-critical avionics, utilizing UVM-based methodology and coverage-driven verification.

Skills and focus areas

• fpga verification
• soc verification
• uvm
• systemverilog
• object-oriented programming
• coverage-driven verification
• constrained-random verification
• transaction-level modeling
• regression testing
• rtl debugging
• hardware validation
• board bring-up