[ engineering ]

Principal Dft Engineer (silicon Engineering)

SpaceX
Location
Palo Alto, California
Work mode
On-site
Type
full time
Listed

Applications go directly to SpaceX. Ramai takes no fee for placement and no money for ranking.

[ About this role ]

SpaceX is seeking a Principal DFT Engineer for Silicon Engineering in Palo Alto, California. This role involves leading the implementation and optimization of DFT architectures, owning ATPG tools and methodologies, and providing post-silicon testing support for next-generation ASICs used in the Starlink network.

Skills and focus areas

  • dft architectures
  • scan insertion
  • compression/decompression logic
  • memory bist
  • logic bist
  • atpg tools
  • stuck-at fault models
  • transition fault models
  • path delay fault models
  • pattern compression
  • diagnosis
  • hierarchical test flows

Summary written by Ramai from the original posting. Full details and requirements are on SpaceX’s careers page.

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