Fpga Verification Engineer, Air Dominance and Strike

FPGA Verification Engineer at Anduril Industries in Costa Mesa, CA. This role focuses on verifying FPGA/SoC designs for flight-critical avionics using UVM-based methodology and coverage-driven verification. Responsibilities include architecting verification environments, developing test sequences, and collaborating with design engineers.

Skills and focus areas

• fpga verification
• soc verification
• uvm
• systemverilog
• object-oriented programming
• coverage-driven verification
• constrained-random verification
• transaction-level modeling
• rtl debugging
• hardware validation
• board bring-up
• avionics development