[ engineering ]

Fpga/asic Design Engineer (silicon Engineering)

SpaceX
Location
Irvine, California
Work mode
On-site
Type
full time
Listed

Applications go directly to SpaceX. Ramai takes no fee for placement and no money for ranking.

[ About this role ]

SpaceX is hiring an FPGA/ASIC Design Engineer for their Silicon Engineering team in Irvine, California. This role involves designing and implementing next-generation FPGAs and ASICs for Starlink projects, optimizing for power, performance, and area, and participating in the full ASIC/FPGA design lifecycle.

Skills and focus areas

  • asic design
  • fpga design
  • soc integration
  • verilog
  • system verilog
  • design optimization
  • power optimization
  • performance optimization
  • area optimization
  • microarchitecture
  • design partitioning
  • lab bring-up

Summary written by Ramai from the original posting. Full details and requirements are on SpaceX’s careers page.

[ More at SpaceX ]

See all 2874 open roles at SpaceX →

[ Similar roles at other startups ]

Browse all open engineering roles →

[ Not quite right? ]

Tell the assistant what you’re after — stage, location, stack, visa sponsorship — and it searches every open role for you. A few questions are free, no account needed.