Design Verification Engineer (silicon Engineering)
SpaceX- Location
- Palo Alto, California
- Work mode
- On-site
- Type
- full time
- Listed
Applications go directly to SpaceX. Ramai takes no fee for placement and no money for ranking.
[ About this role ]
Design Verification Engineer at SpaceX responsible for digital ASIC verification at block and system level. This role involves writing and reviewing test plans, developing test harnesses and sequences, and building SystemVerilog testbench infrastructure for DSP blocks. The engineer will execute test plans, run regressions, and achieve code and functional coverage closure.
Skills and focus areas
- digital asic verification
- test plan development
- test harness development
- test sequence development
- systemverilog
- uvm
- dsp blocks
- regression testing
- code coverage
- functional coverage
- test case automation
Summary written by Ramai from the original posting. Full details and requirements are on SpaceX’s careers page.
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