[ engineering ]

Design Verification Engineer (silicon Engineering)

SpaceX
Location
Redmond, Washington
Work mode
On-site
Type
full time
Listed

Applications go directly to SpaceX. Ramai takes no fee for placement and no money for ranking.

[ About this role ]

Design Verification Engineer at SpaceX working on next-generation ASICs for Starlink. Responsibilities include digital ASIC verification at block and system level, writing test plans, developing test harnesses and sequences, and building SystemVerilog testbench infrastructure.

Skills and focus areas

  • digital asic verification
  • test plan development
  • test harness development
  • test sequence development
  • systemverilog
  • uvm
  • regression testing
  • coverage closure
  • test case automation

Summary written by Ramai from the original posting. Full details and requirements are on SpaceX’s careers page.

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