[ engineering ]
Design Verification Engineer - Internal Ip
Etched- Location
- Not specified
- Work mode
- On-site
- Type
- full time
- Listed
Applications go directly to Etched. Ramai takes no fee for placement and no money for ranking.
[ About this role ]
Design Verification Engineer at Etched, focusing on internal IP. Responsibilities include developing and maintaining UVM/SystemVerilog testbenches for high-performance IPs like systolic arrays, DMA engines, and NoCs, defining and executing verification plans, and debugging complex issues.
Skills and focus areas
- uvm
- systemverilog
- design verification
- rtl debugging
- problem-solving
- performance analysis
- hardware-software co-design
- compute arrays
- dma engines
- nocs
- memory subsystems
Summary written by Ramai from the original posting. Full details and requirements are on Etched’s careers page.
[ More at Etched ]
See all 123 open roles at Etched →[ Similar roles at other startups ]
- Software Engineer - SystemsDoe
- Site Reliability Engineer, Sr. Site Reliability EngineerProve
- Senior Software Engineer, ComputationAurora Solar
- Chief Technology OfficerArtsy
- Staff Technical Program Manager - MobileMX Technologies
- Software Engineer - Full-stackCardless
[ Not quite right? ]
Tell the assistant what you’re after — stage, location, stack, visa sponsorship — and it searches every open role for you. A few questions are free, no account needed.