[ engineering ]

Design Verification Engineer

OpenAI
Location
Remote
Work mode
Remote
Type
full time
Listed

Applications go directly to OpenAI. Ramai takes no fee for placement and no money for ranking.

[ About this role ]

OpenAI is seeking a Senior Design Verification Engineer to ensure the functional correctness of custom ML accelerators. This role involves owning the verification of IP blocks, subsystems, or full SoCs, defining verification plans, and developing testbenches using SystemVerilog/UVM.

Skills and focus areas

  • hardware verification
  • systemverilog
  • uvm
  • rtl verification
  • soc verification
  • ip verification
  • constrained-random verification
  • directed verification
  • system-level verification
  • regression infrastructure
  • coverage analysis
  • bug triage

Summary written by Ramai from the original posting. Full details and requirements are on OpenAI’s careers page.

[ More at OpenAI ]

See all 812 open roles at OpenAI →

[ Similar roles at other startups ]

Browse all open engineering roles →

[ Not quite right? ]

Tell the assistant what you’re after — stage, location, stack, visa sponsorship — and it searches every open role for you. A few questions are free, no account needed.