Asic/soc Dft Engineer (silicon Engineering)

This is a mid-level ASIC/SOC DFT Engineer role within SpaceX's Silicon Engineering team in Austin, TX. The engineer will be responsible for evaluating design readiness for scan insertion, integrating and verifying DFT fabrics, running scan insertion through synthesis tools, and performing ATPG analysis.

Skills and focus areas

• design for test (dft)
• scan insertion
• rtl
• physical design
• scan design rule check (drc)
• synthesis
• automatic test pattern generation (atpg)
• asic implementation